The present invention relates to a large-scale integrated circuit (LSI) using minute capacitors, and a process for producing the same.
In order to obtain a given capacitance in a small planar area in a large-scale integrated circuit including a dynamic random access memory (DRAM), its structure has been complicated with the rise in high integration degree. Silicon oxide film or silicon nitride film used as a dielectric film for capacitors has a low dielectric constant; therefore, ferroelectric materials having a very large dielectric constant from several hundreds to several thousands have been investigated for use as a capacitor dielectric film as disclosed in Japanese Patent Application Laid-Open No. 63-201998.
Ferroelectric materials have spontaneous polarization, and the direction thereof can be reversed by an outer electric field. Therefore, by using this property, formation of nonvolatile memories has been attempted.
As the aforementioned ferroelectric materials, an oxide ferroelectric material such as lead zirconate titanate or bismuth layer ferroelectric material is commonly known. The memory using the ferroelectric material is a memory using the phenomenon that the spontaneous polarization of the ferroelectric material is reversed by a high electric filed value and the direction of spontaneous polarization corresponds to the information "1" and "0" in the memory. In order to read the information stored in the memory, an electric fieled is applied to the ferroelectric film to detect electric charges flowing out at that time. The spontaneous polarization is directed to a specific direction in the crystal, but in the thin film ordinarily composed of polycrystal, its average value corresponds to the effective amount of information.
As disclosed in, for example, Japanese Patent Application Laid-Open No. 3-256358, the structure of a memory is general one wherein a semiconductor substrate having a formed MOS transistor is coated with a dielectric material 81 (FIG. 13) and thereon a ferroelectric capacitor is formed and wherein one electrode of the ferroelectric capacitor is connected to the source or the drain of the MOS transistor by means of a conductive material 82 embedded inside a contact hole dug in the dielectric material. In this structure, a capacitor is formed to extend over a plug 82 in which poly silicon is embedded and an amorphous interlayer dielectric 81. The capacitor is made by means of an upper electrode 86, a ferroelectric film 85 and a lower electrode 84. The temperature for making the ferroelectric film 85 is 500.degree. C. or more. Thus, the lower electrode 84 used commonly is made of platinum. However, a conductive diffusion barrier 83 such as Ti, Ta, TiN or TiSi.sub.2 is disposed between the platinum electrode 84 and the polycrystal silicon layer 82, so as not to deteriorate the ferroelectric capacitor characteristics by the phenomenon that platinum is reacted with silicon to form a silicide or Si is diffused in platinum to form a Si oxide film on the surface of platinum. This conductive diffusion barrier 83 is polycrystal because it is formed on the polycrystal silicon layer 82 and the amorphous interlayer dielectric 81. For this reason, the ferroelectric film 85 formed thereon also becomes polycrystal. On the other hand, there is also known a structure wherein a conductive diffusion barrier is formed on polycrystal silicon, as described in Japanese Patent Application Laid-Open 6-5810, although the polycrystal silicon is not formed as an underlayer to improve the crystallinity of films formed thereon.
As memories are highly integrated, however, the area of a capacitor becomes smaller so that its size will become as small as the size of a crystallite of a ferroelectric material. In this state, spontaneous polarization is directed to the perpendicular direction to the substrate in a crystallite of a certain capacitor while spontaneous polarization is directed to the direction in parallel to the substrate for a crystallite of the other capacitor. In nonvolatile memories, therefore, spontaneous polarization values for their capacitors are largely varied so that the memories will incorrectly operate. Similarly, in DRAMs their signals are varied from cell to cell. Thus, it is necessary that the finite number of crystallites constituting respective capacitors are oriented to a specific direction. However, control of crystal orientation of the electrode on the capacitor cannot be expected in the case, as in the prior art memories, wherein the capacitor is formed to extend over the polycrystal silicon layer 82 and the amorphous interlayer dielectric 81, or wherein the capacitor is formed on the polycrystal silicon layer but it includes a very thin portion and crystallographic properties or surface roughness are not taken into account.
An object of the present invention is to provide a semiconductor device having capacitors whose spontaneous polarization does not vary from capacitor to capacitor, and are highly reliable and suitable for high integration; and a process for producing the semiconductor.